Study on warpage and shrinkage of flip chip encapsulation process

Y. K. Shen, J. H. Liao, W. X. Zhao

研究成果: 雜誌貢獻文章同行評審

8 引文 斯高帕斯(Scopus)


Flip chip encapsulation process is currently the most advanced package technology due to its ability to provide a large number of I/O interconnections and improve electrical performance. It has the advantage of low cost, low interface and small volume in IC package. This paper indicates that the analysis for package of the solder ball chip and substrate. A finite element simulation of moving bounderies in a three-dimensional inertia-free, incompressible flow is presented. The injection situation uses for one line injection, L line injection, U line injection location. The injection process uses for different parameters (mold temperature, injection temperature, injection pressure, injection time). When the injection molding is end, then also finite element method to simulate the warpage and shrinkage for solder ball chip and substrate. The results show that the warpage is smallest on U line injection.
頁(從 - 到)693-702
期刊International Communications in Heat and Mass Transfer
出版狀態已發佈 - 7月 1 2004

ASJC Scopus subject areas

  • 原子與分子物理與光學
  • 一般化學工程
  • 凝聚態物理學


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