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Design of 20-Gb/s four-level pulse amplitude modulation VCSEL driver in 90-nm CMOS technology
Jhe Yue Li, Jau Ji Jou, Tien Tsorng Shih, Chien Liang Chiu, Jian Chiun Liou, Hsin Wen Ting
Research output: Chapter in Book/Report/Conference proceeding › Conference contribution
5
Citations
(Scopus)