Design of 20-Gb/s four-level pulse amplitude modulation VCSEL driver in 90-nm CMOS technology

Jhe Yue Li; Jau Ji Jou; Tien Tsorng Shih; Chien Liang Chiu; Jian Chiun Liou; Hsin Wen Ting

doi:10.1109/EDSSC.2016.7785242

Design of 20-Gb/s four-level pulse amplitude modulation VCSEL driver in 90-nm CMOS technology

Jhe Yue Li, Jau Ji Jou, Tien Tsorng Shih, Chien Liang Chiu, Jian Chiun Liou, Hsin Wen Ting

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

5 Citations (Scopus)

Abstract

Using 4-level pulse amplitude modulation (PAM-4) technique, the transmission data bit rate of the system or circuit can be doubled at the same bandwidth, compared to non-return zero (NRZ) binary modulation. In this paper, a PAM-4 vertical cavity surface emitting laser (VCSEL) diode driver circuit was designed in 90 nm CMOS technology. Through our circuit, two 10-Gb/s non-return zero (NRZ) input signals can be combined as a 20-Gb/s (10-GBaud/s) PAM-4 output current signal to drive a VCSEL diode. In our laser diode driver (LDD) circuit, the total modulation current is about 6.2mA, the power consumption is 34.1mW, and the chip size is 0.5×0.62 mm². The VCSEL driver can be suitable to use in the transmitter module of short range optical fiber communications.

Original language	English
Title of host publication	2016 IEEE International Conference on Electron Devices and Solid-State Circuits, EDSSC 2016
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	195-198
Number of pages	4
ISBN (Electronic)	9781509018307
DOIs	https://doi.org/10.1109/EDSSC.2016.7785242
Publication status	Published - Dec 15 2016
Externally published	Yes
Event	2016 IEEE International Conference on Electron Devices and Solid-State Circuits, EDSSC 2016 - Hong Kong, Hong Kong Duration: Aug 3 2016 → Aug 5 2016

Publication series

Name	2016 IEEE International Conference on Electron Devices and Solid-State Circuits, EDSSC 2016

Conference

Conference	2016 IEEE International Conference on Electron Devices and Solid-State Circuits, EDSSC 2016
Country/Territory	Hong Kong
City	Hong Kong
Period	8/3/16 → 8/5/16

Keywords

4-level pulse amplitude modulation (PAM-4)
laser diode driver (LDD)
vertical cavity surface emitting laser (VCSEL)

ASJC Scopus subject areas

Electrical and Electronic Engineering
Hardware and Architecture

Access to Document

10.1109/EDSSC.2016.7785242

Cite this

Li, J. Y., Jou, J. J., Shih, T. T., Chiu, C. L., Liou, J. C., & Ting, H. W. (2016). Design of 20-Gb/s four-level pulse amplitude modulation VCSEL driver in 90-nm CMOS technology. In 2016 IEEE International Conference on Electron Devices and Solid-State Circuits, EDSSC 2016 (pp. 195-198). Article 7785242 (2016 IEEE International Conference on Electron Devices and Solid-State Circuits, EDSSC 2016). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/EDSSC.2016.7785242

Design of 20-Gb/s four-level pulse amplitude modulation VCSEL driver in 90-nm CMOS technology. / Li, Jhe Yue; Jou, Jau Ji; Shih, Tien Tsorng et al.
2016 IEEE International Conference on Electron Devices and Solid-State Circuits, EDSSC 2016. Institute of Electrical and Electronics Engineers Inc., 2016. p. 195-198 7785242 (2016 IEEE International Conference on Electron Devices and Solid-State Circuits, EDSSC 2016).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Li, JY, Jou, JJ, Shih, TT, Chiu, CL, Liou, JC & Ting, HW 2016, Design of 20-Gb/s four-level pulse amplitude modulation VCSEL driver in 90-nm CMOS technology. in 2016 IEEE International Conference on Electron Devices and Solid-State Circuits, EDSSC 2016., 7785242, 2016 IEEE International Conference on Electron Devices and Solid-State Circuits, EDSSC 2016, Institute of Electrical and Electronics Engineers Inc., pp. 195-198, 2016 IEEE International Conference on Electron Devices and Solid-State Circuits, EDSSC 2016, Hong Kong, Hong Kong, 8/3/16. https://doi.org/10.1109/EDSSC.2016.7785242

Li JY, Jou JJ, Shih TT, Chiu CL, Liou JC, Ting HW. Design of 20-Gb/s four-level pulse amplitude modulation VCSEL driver in 90-nm CMOS technology. In 2016 IEEE International Conference on Electron Devices and Solid-State Circuits, EDSSC 2016. Institute of Electrical and Electronics Engineers Inc. 2016. p. 195-198. 7785242. (2016 IEEE International Conference on Electron Devices and Solid-State Circuits, EDSSC 2016). doi: 10.1109/EDSSC.2016.7785242

Li, Jhe Yue ; Jou, Jau Ji ; Shih, Tien Tsorng et al. / Design of 20-Gb/s four-level pulse amplitude modulation VCSEL driver in 90-nm CMOS technology. 2016 IEEE International Conference on Electron Devices and Solid-State Circuits, EDSSC 2016. Institute of Electrical and Electronics Engineers Inc., 2016. pp. 195-198 (2016 IEEE International Conference on Electron Devices and Solid-State Circuits, EDSSC 2016).

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abstract = "Using 4-level pulse amplitude modulation (PAM-4) technique, the transmission data bit rate of the system or circuit can be doubled at the same bandwidth, compared to non-return zero (NRZ) binary modulation. In this paper, a PAM-4 vertical cavity surface emitting laser (VCSEL) diode driver circuit was designed in 90 nm CMOS technology. Through our circuit, two 10-Gb/s non-return zero (NRZ) input signals can be combined as a 20-Gb/s (10-GBaud/s) PAM-4 output current signal to drive a VCSEL diode. In our laser diode driver (LDD) circuit, the total modulation current is about 6.2mA, the power consumption is 34.1mW, and the chip size is 0.5×0.62 mm2. The VCSEL driver can be suitable to use in the transmitter module of short range optical fiber communications.",

keywords = "4-level pulse amplitude modulation (PAM-4), laser diode driver (LDD), vertical cavity surface emitting laser (VCSEL)",

author = "Li, {Jhe Yue} and Jou, {Jau Ji} and Shih, {Tien Tsorng} and Chiu, {Chien Liang} and Liou, {Jian Chiun} and Ting, {Hsin Wen}",

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AU - Shih, Tien Tsorng

AU - Chiu, Chien Liang

AU - Liou, Jian Chiun

AU - Ting, Hsin Wen

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N2 - Using 4-level pulse amplitude modulation (PAM-4) technique, the transmission data bit rate of the system or circuit can be doubled at the same bandwidth, compared to non-return zero (NRZ) binary modulation. In this paper, a PAM-4 vertical cavity surface emitting laser (VCSEL) diode driver circuit was designed in 90 nm CMOS technology. Through our circuit, two 10-Gb/s non-return zero (NRZ) input signals can be combined as a 20-Gb/s (10-GBaud/s) PAM-4 output current signal to drive a VCSEL diode. In our laser diode driver (LDD) circuit, the total modulation current is about 6.2mA, the power consumption is 34.1mW, and the chip size is 0.5×0.62 mm2. The VCSEL driver can be suitable to use in the transmitter module of short range optical fiber communications.

AB - Using 4-level pulse amplitude modulation (PAM-4) technique, the transmission data bit rate of the system or circuit can be doubled at the same bandwidth, compared to non-return zero (NRZ) binary modulation. In this paper, a PAM-4 vertical cavity surface emitting laser (VCSEL) diode driver circuit was designed in 90 nm CMOS technology. Through our circuit, two 10-Gb/s non-return zero (NRZ) input signals can be combined as a 20-Gb/s (10-GBaud/s) PAM-4 output current signal to drive a VCSEL diode. In our laser diode driver (LDD) circuit, the total modulation current is about 6.2mA, the power consumption is 34.1mW, and the chip size is 0.5×0.62 mm2. The VCSEL driver can be suitable to use in the transmitter module of short range optical fiber communications.

KW - 4-level pulse amplitude modulation (PAM-4)

KW - laser diode driver (LDD)

KW - vertical cavity surface emitting laser (VCSEL)

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Design of 20-Gb/s four-level pulse amplitude modulation VCSEL driver in 90-nm CMOS technology

Abstract

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