Abstract
This work presents a biomedical signal processor (BSP) with hybrid functional cores to optimize the power dissipation and system flexibility for mobile healthcare applications. Embedded with the biomedical core and a 32-bit RISC core, multi-features are extracted for classification and the abnormal data are compressed. In addition, the crypto core secures both the data and wireless link protocols to protect the user privacy. This BSP chip is fabricated in a 90nm standard CMOS technology with core area of 1.17mm 2. To overcome the leakage in advanced technology, a duty-cycled clock generator minimizes the system active duty and the inactive functions are power gated. Operating at 25MHz frequency and 0.5V supply voltage, the energy of RISC core is down to 3.44pJ/cycle. Accompanied with dedicated biomedical and crypto cores, the average BSP power achieves 38μW at 25MHz and 0.5/1.0V when performing the ECG alarm application.
Original language | English |
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Title of host publication | 2011 Proceedings of Technical Papers: IEEE Asian Solid-State Circuits Conference 2011, A-SSCC 2011 |
Pages | 301-304 |
Number of pages | 4 |
DOIs | |
Publication status | Published - 2011 |
Event | 7th IEEE Asian Solid-State Circuits Conference, A-SSCC 2011 - Jeju, Korea, Republic of Duration: Nov 14 2011 → Nov 16 2011 |
Other
Other | 7th IEEE Asian Solid-State Circuits Conference, A-SSCC 2011 |
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Country/Territory | Korea, Republic of |
City | Jeju |
Period | 11/14/11 → 11/16/11 |
ASJC Scopus subject areas
- Hardware and Architecture
- Electrical and Electronic Engineering